The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs.
In order to assist with scaling down, extreme ultraviolet (EUV) photolithography processes are used to pattern wafers. During photolithographic exposure, radiation contacts a photomask before striking a photoresist coating on a wafer. The radiation transfers a pattern from the photomask onto the photoresist. The photoresist is selectively removed to reveal the pattern. The substrate then undergoes processing steps that take advantage of the shape of the remaining photoresist to create features on the substrate. When the processing steps are complete, photoresist is reapplied and the wafer is exposed using a different mask to impart a different pattern. In this way, the features are layered to produce a semiconductor device.